Re:F4PGA: Open FPGA Tooling: Xilinx 7-Series, Lattice iCE40/...
by packetlost on Friday September 16, 2022 @10:40AM
(#32866644)
Yeah, that's definitely a concern! The datasheets gives an example of serial communication and recommends using non-standard baud-rates to avoid this problem. It's not perfect, but my point was it's not just another MCU, there is actually some hardware that makes it somewhat unique.
You can also adjust the system clock if you're desperate, though I'm not sure if that would entirely eliminate jitter (I haven't tried it)
You can also adjust the system clock if you're desperate, though I'm not sure if that would entirely eliminate jitter (I haven't tried it)