Re:MIPS provides highly scalable RISC processor IP
by panick21_ on Friday April 08, 2022 @09:00PM
(#30964298)
SPARC was a open standard but only one 32 bit version and later 64 bit updates were already available. And at that point interest in Open Source and Open Hardware simply didn't exist to the same degree. In the 'modern' period, nobody has interest in working with something Oracle controls.
Power was always 'fake open' it was basically a marketing vehicle and there were not actually open chips being built with it. Only in response to RISC-V did some of that change.
SuperH was under patent when RISC-V started and it was simple much less known about as well. Once it was actually going RISC-V was already happening and had far more momentum and RISC-V was 64 bit from the beginning.
As with so many thing Sun could have changed the world much more fundamentally had they understood open source better.
There was OpenRisc but that was really more a chip design and the ISA and it was also only 32 bit. OpenRISC was basically some students starting to implementing a design from David Patterson textbook. It was also a license that they didn't like.
So really you needed a ISA that was designed for architecture independent with 32 bit and 64 bit and that was 'future prove' in terms of license, design and so on and importantly some actually working chip and softcore being available for people to tinker with. Berkley did that and they taped out many chips while designing RISC-V. Other universities jumped on board and ETH was producing and taping out cores. From that point is snowballed.
One could imagine an alternative future where Super-H takes off and universities adopting and Berkley does a 62 bit Super-H or something like that.
Power was always 'fake open' it was basically a marketing vehicle and there were not actually open chips being built with it. Only in response to RISC-V did some of that change.
SuperH was under patent when RISC-V started and it was simple much less known about as well. Once it was actually going RISC-V was already happening and had far more momentum and RISC-V was 64 bit from the beginning.
As with so many thing Sun could have changed the world much more fundamentally had they understood open source better.
There was OpenRisc but that was really more a chip design and the ISA and it was also only 32 bit. OpenRISC was basically some students starting to implementing a design from David Patterson textbook. It was also a license that they didn't like.
So really you needed a ISA that was designed for architecture independent with 32 bit and 64 bit and that was 'future prove' in terms of license, design and so on and importantly some actually working chip and softcore being available for people to tinker with. Berkley did that and they taped out many chips while designing RISC-V. Other universities jumped on board and ETH was producing and taping out cores. From that point is snowballed.
One could imagine an alternative future where Super-H takes off and universities adopting and Berkley does a 62 bit Super-H or something like that.