Re:VRoom A high end RISC-V implementation
by Taniwha on Tuesday March 22, 2022 @12:11AM
(#30762660)
Yes VRoom! with renaming has as many registers as it has commitQ entries plus the architectural ones. So 64/32 + 31 (integer) + 32 (fp) + 32 (vector)
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Re:VRoom A high end RISC-V implementation
by phkahler on Tuesday March 22, 2022 @09:22AM
(#30765735)
The idea was to have as many simple ALUs as registers. Results are kept in the ALU/register. All reads are essentially result forwarding. For example a simple RV32I requires 2 read ports and one write port on each register. If we use 2 R/W ports and put an ALU on each register, you reduce from 3 to 2 busses and can also do operations 2 at a time when an instruction clobbers one of its inputs. Or an ALU op along with a load/store.