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Re:Lanai, the mystery CPU architecture in LLVM by quercusa on Monday March 21, 2022 @04:17PM (#30759158)
This line in that post is mystifying: they peddled Infiniband, an inferior design based on bus technology, but repositioned as a point to point network
Re:Lanai, the mystery CPU architecture in LLVM by drewg123 on Monday March 21, 2022 @05:22PM (#30759861)
At least initially (~2005 or so?) we had customers who were given free IB for their HPC clusters ripping the IB out and replacing it with with paid Myrinet installations because they could never get their IB clusters to work reliably.

Although we had the superior product, we could not market our way out of a wet paper bag. Our CEO counted on our (then) superior engineering & expected our products to market themselves. Eventually the IB engineering caught up and surpassed ours, but our marketing never even came close to theirs, so they were the clear winner.

Re:Lanai, the mystery CPU architecture in LLVM by sliken on Wednesday March 23, 2022 @02:00PM (#30781369)
I build a myrinet HPC cluster or two, vague memory that it was 2.5Gbit. Worked well, I particularly liked the cables (thin and optical, way nicer than IB cables). When I went to replace them the Myrinet 10G was repeatedly delayed, and seemed to be focusing on 10G ethernet, not MPI/HPC.

We ended up going with a new upstart called Pathscale, which then was bought by qlogic, and then Intel. Our benchmarks showed a clear win over Mellanox at the time. In particular on larger jobs the Mellanox drivers seemed to consume a fair bit of ram for each client you were talking to, so even 32 nodes jobs would consume a fair bit of ram. We even built a cluster out of hypertransport connected infinipath cards in a "HTX" slow instead of PCIe. Managed I believe 1.4us latency, which is still reasonably competitive today. We built SDR (first public cluster), DDR (first public cluster), QDR based clusters. But then Intel said the new Infinipath would not be supported on AMD nodes, or even previous gen Intel nodes, I said it's a non starter and switched to Mellanox. I talked to several other HPC sites that said the same thing, months later Intel killed off the product. Sad and short sited on Intel's part.

Re:Lanai, the mystery CPU architecture in LLVM by bee_rider on Tuesday March 22, 2022 @12:50AM (#30762831)
Where'd the name Myricom/Myrinet come from? "Infiniband" is a pretty cool name.
Re:Lanai, the mystery CPU architecture in LLVM by convolvatron on Monday March 21, 2022 @08:09PM (#30761372)
unless I'm thinking of the wrong vendor, the myrinet devices supported programming the nic. for some applications that was a really big win over IB verbs
Re:Lanai, the mystery CPU architecture in LLVM by drewg123 on Monday March 21, 2022 @09:17PM (#30761790)
Yes and no. The original firmware / host driver stack was open (shared?) source called MyriAPI. It was so terrible that spawned an ecosystem of uni and research lab projects to implement replacements. I worked on one such project at Duke (Trapeze). Others included BIP, Fast Messages, Active Messages.

MyriAPI was later replaced by a new firmware / host stack called GM. I think at some point we stopped shipping firmware source. I think that point was the transition from MyriAPI to GM...

Re:Lanai, the mystery CPU architecture in LLVM by detaro on Monday March 21, 2022 @04:41PM (#30759427)
I think that's a confusing reference to the fact that InfiniBand initially was supposed to be also a replacement for system-internal buses (i.e. a PCI replacement), before PCIe took that place instead.
Re:Lanai, the mystery CPU architecture in LLVM by gnufx on Monday March 21, 2022 @05:37PM (#30760046)
I wasn't there, but understood it was intended for general machine-room -- I dislike "datacentres" -- use; Wikipedia implies it was intended for ~everything...

Anyway, IB at least had lower latency than Myrinet, which is what counts in a lot of HPC. I don't remember the numbers, but I got quite close to Myrinet latency with the on-board 1GbE NICs on Sun x2200s, an un-managed switch, and Open-MX, which was interoperable with the Myrinet MX protocol. (I remember MX being slagged off by Mellanox; I don't know how similar MXM later was for IB.)

Re:Lanai, the mystery CPU architecture in LLVM by monocasa on Monday March 21, 2022 @05:25PM (#30759889)
Yeah that makes sense, it's an RDMA protocol, and PCIe has wayyyy more in common with infiniband then it does with legacy PCI.
Re:Lanai, the mystery CPU architecture in LLVM by dboreham on Monday March 21, 2022 @04:47PM (#30759502)
You can use a bus PHY in a p2p configuration.
Re:Lanai, the mystery CPU architecture in LLVM by wmf on Monday March 21, 2022 @04:56PM (#30759590)
But Infiniband didn't do that.
Re:Lanai, the mystery CPU architecture in LLVM by paulmd on Monday March 21, 2022 @05:48PM (#30760136)
you can do point-to-point connections with infiniband, it's a pretty common homelab use-case since adapters are so cheap these days.
Re:Lanai, the mystery CPU architecture in LLVM by detaro on Monday March 21, 2022 @05:58PM (#30760253)
InfiniBand is always point-to-point, that's the point. The talk about "bus" is confusing/wrong since it never is a bus.
Re:Lanai, the mystery CPU architecture in LLVM by paulmd on Tuesday March 22, 2022 @12:32PM (#30768198)
oh, "bus" in the context of an actual bus, like CAN. I thought p2p just meaning direct-attach. But yeah it's switched, it's not a shared bus.
Re:Lanai, the mystery CPU architecture in LLVM by NavinF on Monday March 21, 2022 @04:52PM (#30759560)
Yeah that makes no sense.