News for hackers. Stuff that matters.
Re:Addressing Criticism of RISC-V Microprocessors by wmf on Sunday March 20, 2022 @02:40PM (#30745334)
Most of the complaints about RISC-V are extremely basic things like array indexing and conditional execution. These will never not be needed.
Re:Addressing Criticism of RISC-V Microprocessors by zik on Sunday March 20, 2022 @10:20PM (#30749334)
The problem is that those criticisms are almost always wrong. For instance the ARM proponents criticise RISC-V for having long instruction encodings and then they quote a few carefully cherry picked examples. But if you look at actual compiled programs RISC-V is nearly always 10-15% smaller than ARM.
Re:Addressing Criticism of RISC-V Microprocessors by tsmi on Sunday March 20, 2022 @03:39PM (#30745874)
I’m sure that’s what the team that invented segment registers said too.

The question is does it make sense to add these to the ISA long term? In the short term, given die density and how memory works today, it has advantages. But die density increases, making OoO cores cheaper, and memory technology changes. It’s not obvious that these are long term improvements.

Re:Addressing Criticism of RISC-V Microprocessors by brucehoult on Sunday March 20, 2022 @07:57PM (#30748153)
It's not that the examples given are not correct, in isolation, it's that they are not common enough in real code to matter.
Re:Addressing Criticism of RISC-V Microprocessors by dgreensp on Sunday March 20, 2022 @06:08PM (#30747196)
IANAE, but the article addresses why the arguments that assume these instructions need to be combined are usually not based on looking at the whole picture.