> The strategy of creating a large die with lots of execution units, then running the chip at a lower clock speed for power efficiency has been Apple's way of doing things for a while now.

> This strategy is something that Anandtech's been calling out since the iPhone 5s chip.

Not sure that applies to M1 Ultra that's clearly marketed as a desktop SoC, not a mobile device or laptop SoC. Optimizing for energy efficiency or battery life is not the same as optimizing for performance first, which is what M1 Ultra is designed for. Not to mention, there's a reason Windows and Linux have multiple power profiles that changes how schedulers and power loads work. macOS has "high power mode" for m1 on laptops and yet strangely, it is not even available on the Mac Studio.

Keep in mind that Apple showed a graph that clearly shows the GPU was at 100-110w. Why do that if they won't run it at that wattage or even talk about 3090 in the first place? Why ruin their reputation over a silly little thing? Everyone on the planet will easily debunk that.

Also, why even bother adding a high-quality cooling system that the Mac Studio clearly don't need since both CPU/GPU are going to be capped at lower power wattage?

We'll find out eventually one way or another.

> Not sure that applies to M1 Ultra that's clearly marketed as a desktop SoC, not a mobile device or laptop SoC.

The M1 Ultra is using the same CPU cores and GPU cores as an iPhone, just more of them.

It's long been their strategy across the board. Throw silicon die area at tons of execution units and run the chip at a lower clock speed for power efficiency.

For example, the 2012 A5X iPad chip had about the same die area as 4 core Ivy Bridge, which was huge for a mobile device SOC.

https://www.anandtech.com/show/6330/the-iphone-5-review/4

Since they are selling the whole widget, they aren't as dependent on minimizing die area to maximize their profit margin.

> The M1 Ultra is using the same CPU cores and GPU cores as an iPhone, just more of them.

Not only that, but it's running them at basically the same clock speeds as the rest of the M1 family, and even as the iPhone. This suggests that they're running at not far above a best efficiency point, rather than way past the elbow of the voltage curve as is traditional for desktop chips.

I would have thought this approach would cause issues for leakage power? Better to run fast then sleep and power gate to cut leakage, especially at smaller geometries.

Or do you think they are mostly using HVt cells?

Doesn't power leakage get much, much worse as temperature increases?

Yes it does, but that just means you want to use as little power as possible (which is presumably already the case).

That effect is actually so bad that I have previously experienced thermal runaway due to it (more power => higher temperature => more power => …)