The interconnect area was already known from third-party die photos of the M1 Max https://twitter.com/vadimyuryev/status/1466526403331952644
They were not known when people keep rampling about the the Mark Gurman report on "just start fusing those M1 CPU's into bigger ones".
I wrote about it three months ago.
Well they were only correct that Apple managed to hide a whole section of Die Image. ( Which is actually genius ) Otherwise it wouldn't have made any sense.
Likely to be using CoWoS from TSMC [1] since the bandwidth numbers fits. But needs further confirmation.
[1] https://en.wikichip.org/wiki/tsmc/cowos