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Re:Intel completely disables AVX-512 on Alder Lake after all by Karunamon on Friday January 07, 2022 @08:27AM (#29838804)
ECC memory on the other hand is always going to be more expensive.
Re:Intel completely disables AVX-512 on Alder Lake after all by marcan_42 on Friday January 07, 2022 @08:36AM (#29838910)
Indeed, which is why it should be an option.

OTOH, it shouldn't be significantly more expensive. It should be ~9/8 the cost of regular memory. It's just one extra chip for every 8. Nothing more.

Re:Intel completely disables AVX-512 on Alder Lake after all by my123 on Friday January 07, 2022 @08:53AM (#29839093)
in-band ECC is also a thing. In that scenario, you give up some capacity for the ECC bits but stay with the same DRAM config as before.

(in-band ECC is present on Elkhart Lake Atoms and on Tegra Xavier for example)

Re:Intel completely disables AVX-512 on Alder Lake after all by namibj on Friday January 07, 2022 @05:44PM (#29845932)
Actually less, because you only need the additional memory chip and associated trace layouting, not any additional PCB manufacturing cost (beyond miniscule yield impact of the additional traces) and no significant added distribution cost (packaging, shipping weight, etc.).