Yield and reticle size!

You can have more chiplets in your processor, but the manufacturing process won't let you make one really big monolith.

You can have something like Cerebras' wafer-scale chip. It's a whole wafer!

But with that approach you still really have a network of identical processor subunits, not one big processor.

Also, for a given resistivity/dielectric and thickness Resistance and Capacitance also scale with length. That means that RC settling time goes as length squared (width roughly cancels since R goes down while C goes up)... ignoring any transistor scaling, just the wiring limits speed very quickly.

Reticle size (limited by lens DoF) is roughly 30mm square, and GPUs have been close to that for years.

Thus the thought experiment near the end of the article:

> assume two iPhones floating in space were simulating two connected neurons, with direct laser links between them. In order for the two to communicate with worse than the 1/200 second latency as neighboring neurons in our brains do...the two phones would need to be over 1000 miles away from each other, about the radius of the moon.

> Thus, for the silicon advantage to start hitting scale out limits relative to what we know is biologically necessary, we would need to be building computers about the size of the moon.

I suppose that in the brain most neurons talk to their relatively close neighbors.

To get something comparable to brain tissue, we need to be able to disperse the computing power and memory across a large number of small nodes. Currently both CPUs and RAM are hyper-centralized.

Consider what we started with - vacuum tube transistors - and the tasks being optimized, and learn about the first few iterations as processors were being developed. If each transistor is a bit then the number of transistors is the number of bits you can process per cycle. Each time you cut the transistor size in half, you can fit 4 times as many transistors in the same space, and it takes less time for signal to propagate between individual transistors. At a certain point, physics limitations will prevent shrinking the 2d area over which you can arrange transistors, so you'll have to start building into 3d arrangements.

Bigger is slower and uses less transistors. It's also hotter, since the electrical connections are longer and thus have more resistance.

It's not consumer-oriented, but:

https://en.wikipedia.org/wiki/Wafer-scale_integration

Cost. Bigger is more expensive, so going bigger improves performance but does not improve performance per dollar.

Power and speed. Bigger transistors need more electrons to switch and have larger threshold voltages. More voltage and current sloshing back and forth means more time per transition and more power.

>why do we need to go smaller and smaller

Cost, performance, Energy efficiency.

You can't make a CPU faster by making it bigger. All you can do is have more CPUs working at the same time. But for the most part computers don't need more parallel processors, they need to figure out how to use the ones they already have.

> You can't make a CPU faster by making it bigger.

Modern CPUs identify and take advantage of potential parallelism in apparently sequential code. When you compare Apple’s large cores with the small ones on the same SoC the extra transistors are used to do this.

So you can make a CPU faster by making it bigger.

Well, the last decade of graphics processing and ml are pretty solidly on the side of more+better parallelism. And brains, for that matter.

Human cells/neurons also run in parallel.

bigger = components are far away to each other = electric signals have to travel for a longer time