Re:M1 Pro First Impressions: Core Management and CPU Perform...
by saagarjha on Friday November 05, 2021 @08:12AM
(#29118103)
M1's cores are homogenous and all of them support TSO.
Re:M1 Pro First Impressions: Core Management and CPU Perform...
by masklinn on Friday November 05, 2021 @09:05AM
(#29118630)
Saying that the M1's cores are homogenous is pretty misleading / confusing as the icestorm and firestorm cores are rather different. big.LITTLE/DIQ-type architectures are usually considered heterogenous even if all the actors share an ISA (because you can't treat all the cores
But as to the latter assertion, you're indeed correct per Joe Groff (Swift compiler engineer at Apple): https://twitter.com/jckarter/status/1332045390057639939
> The A12 only supported TSO on the performance cores. The M1 supports it on all cores.
Re:M1 Pro First Impressions: Core Management and CPU Perform...
by saagarjha on Friday November 05, 2021 @09:45AM
(#29119121)
Yeah, when I said "homogenous" I was solely referring to the ISA. Trying to enable TSO on a Tempest core will fail with an undefined instruction exception, but I think A12Z is ISA homogenous in userspace.
For the Mac, I believe you have equivalent access for scheduling between posix and GCD, but the scheduling configuration is likely way more approachable in GCD.
Also: On M1, there is an added capability to run in a stricter memory model to speed up x86_64 emulation. This only is available on the performance cores, which is one of the reasons people observe non-native code draining the battery quicker.