Re:M1 Pro First Impressions: Core Management and CPU Perform...
by saagarjha on Friday November 05, 2021 @09:45AM
(#29119121)
Yeah, when I said "homogenous" I was solely referring to the ISA. Trying to enable TSO on a Tempest core will fail with an undefined instruction exception, but I think A12Z is ISA homogenous in userspace.
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