Re:Rendering on the Apple M1 Max Chip
by smoldesu on Tuesday October 26, 2021 @03:13PM
(#29004889)
Just being pedantic, DDR5's implementation of on-die ECC is still not equivalent to the implementation on CPUs. It doesn't account for errors that occur during processing, and there's still a pretty significant chance of corruption in L1-3 caches.
M1X is using DDR5 which does have on-die ECC.