TSMC 7nm = Intel 10nm is a crazy old trope that dates back to before everyone realised that Intel couldn't deliver 10nm. I don't know why people keep repeating it.

Any node after they stopped measuring gate dimensions is a trope.

We need a better metric, a marketing term doesn’t work.

>TSMC 7nm is ahead in many ways. For example, Intel 10nm power efficiency is much worse.

Is this based on the lithography process, or because of the uarch?

The 7nm = 10nm was from https://en.wikichip.org/wiki/File:7nm_densities.svg, which looked at the density. Based comparison tables of lithography processes, it doesn't even look like power is something that they compare (eg. https://en.wikichip.org/wiki/7_nm_lithography_process)

In your second link there's Power @ iso-speed comparisons within TSMC's nodes and TSMC has 3 revisions of their N7 with 3 different power usages. Presumably, Intel can do similar things within their generations too.