FORTRAN or any language with lots of arrays and matrices.

I suspect if you want a HW architecture for running array operations you'll end up with something like a vector machine (e.g. ARM SVE(2) ) or a GPU rather than a VLIW CPU?

VLIW is basically a more flexible kind of vector machine.

And a traditional scalar architecture is more flexible still. The trick is to pick the correct set of tradeoffs for the targeted applications. I claim that for most array style workloads vector/GPU architectures are flexible enough, and offer better perf/watt and perf/chip area.

So, APL?

Absolutely yes that would make sense (or more likely the modern "derivatives" like J & K)