It’s Not Always iCache

Re:It’s Not Always iCache by CalChris on Monday July 12, 2021 @03:38PM (#27814125)

Is the result different for this benchmark for an ARMv8 cpu with its ~31 registers vs an x86_64 CPU with its ~15 registers? For example, M1 vs Skylake?

[ Parent | on HN ]

Re:It’s Not Always iCache by ComputerGuru on Wednesday July 14, 2021 @06:11PM (#27839081)

x86_64 has 15 named registers, but many more in practice. Register renaming is used to bypass code that juggles between them.

[ Parent | on HN ]

Re:It’s Not Always iCache by CalChris on Wednesday July 14, 2021 @06:51PM (#27839467)

I’m aware of that. But the compiler is limited to using the architectural register sets.

[ Parent | on HN ]

Re:It’s Not Always iCache by ComputerGuru on Wednesday July 14, 2021 @10:10PM (#27840759)

Right, but the modern CPU pretty much ignores that altogether and looks only at dependency chains to decide which and how many registers to use.

[ Parent | on HN ]