Presumably it's quite a bit cheaper (and more power efficient) to build a 6.4 terabit P4/Tofino switch vs. building a 6.4 terabit switch with eBPF on x86, ARM, or even NPUs. P4 can also enable an SDN control channel, P4runtime, that uses gRPC.

One nice thing about P4 is that it is a machine-executable (and potentially verifiable) specification for how switching ASICs should work.