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Re:AMD Demonstrates Stacked 3D V-Cache Technology: 192 MB at... by Dylan16807 on Tuesday June 01, 2021 @03:11PM (#27359770)
> The additional L3 is per chiplet, so you're still going to have to talk to other chiplets and their L3.

You will sometimes, but traffic that still overflows to the other chiplet is probably almost all traffic that would have gone to RAM before.

And as a reference point, cross-chiplet L3 is about 50 nanoseconds slower than local L3. That will dwarf most things.

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