Five Tips to Writing RISC-V Assembly

Re:Five Tips to Writing RISC-V Assembly by bombcar on Sunday May 23, 2021 @09:33PM (#27260310)

Understandable the architecture calling conventions are important - if registers are marked as destroyed you must treat them as such, even if in your code it seems they’re preserved.

Single-stepping debuggers have caused weird side effects in the past (the trap instruction coincidentally keeps a register with a “sane” value and so it’s not noticed that in normal operation it gets scrambled).

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Re:Five Tips to Writing RISC-V Assembly by brucehoult on Tuesday May 25, 2021 @02:04AM (#27273284)

Note that the base RISC-V ISA (IMA extensions) doesn't say anything about calling conventions or functions (calls and returns) or even a stack. All X registers except X0 are interchangeable.

Which registers are caller save or callee save or even which is the stack pointer or function return address is all purely a software convention in a particular OS and/or compiler.

(the C extension gives greater program compression if used with an ABI that uses X1 as the Return Address and X2 as the Stack Pointer, and X8-X15 as the most commonly used registers, but even then nothing breaks if you don't)

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