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Re:Intel 3rd gen Xeon Scalable (Ice Lake): generationally bi... by ineedasername on Tuesday April 06, 2021 @02:27PM (#26715497)
Do chiplets underperform compared to a monolithic die?
Re:Intel 3rd gen Xeon Scalable (Ice Lake): generationally bi... by gsnedders on Tuesday April 06, 2021 @07:56PM (#26718865)
As others have said, in isolation and perfect manufacturing capability, it's absolutely true a monolithic die is better.

However, because each die is smaller, you can be more aggressive with your binning, potentially having a larger number of chips which you can bin into a higher frequency bucket.

Ultimately, it's a matter of trade-offs, and what's right in one place might be wrong in another (see, e.g., AMD manufacturing mobile APUs on monolithic dies versus all their desktop and server parts using chiplets).

We are seeing more of the industry moving to chiplets and similar solutions, notably Intel with their tiles.

Re:Intel 3rd gen Xeon Scalable (Ice Lake): generationally bi... by Symmetry on Tuesday April 06, 2021 @04:11PM (#26716788)
All things being equal a chiplet design will underperform a monolithic die. But we've already seen the benchmarks on the performance of Milan so looking at chiplets versus monolithic is mostly about considering AMD's strategy and constraints rather than how the chips perform.
Re:Intel 3rd gen Xeon Scalable (Ice Lake): generationally bi... by monocasa on Tuesday April 06, 2021 @03:27PM (#26716284)
Pretty much any time you have signals going off chip, you lose out on both bandwidth and latency.
Re:Intel 3rd gen Xeon Scalable (Ice Lake): generationally bi... by wmf on Tuesday April 06, 2021 @02:41PM (#26715651)
Yes.