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Re:On Cache Invalidation: Why Is It Hard? (2018) by toast0 on Monday April 05, 2021 @02:01AM (#26695778)
Almost all communications between devices is memory mapped i/o these days. x86 has i/o ports, but that's mostly used for devices that were specified long ago (although some things are still relevant).

If there was a core to core bulk messaging system, it would be memory mapped as well, and you'd need to store the messages in some sort of memory, so why add a specialized message queue, when you can just use memory?

You can do things like add a message to a mailbox in memory, and then send an interrupt to the other processor to indicate it's ready.

Re:On Cache Invalidation: Why Is It Hard? (2018) by stcredzero on Monday April 05, 2021 @11:04AM (#26699972)
If there was a core to core bulk messaging system, it would be memory mapped as well, and you'd need to store the messages in some sort of memory, so why add a specialized message queue, when you can just use memory?

So one could code inter-thread communication without having to think about inducing large numbers of cache misses and degrading performance.