Re:Matrix multiplication inches closer to mythic goal
by btilly on Tuesday March 23, 2021 @01:32PM
(#26557690)
The answer is no but sort of.
You cannot reduce the number of operations by waving a magic architecture want. Hence the no. But you can do operations in parallel rather than in series. Same number of operations, but it takes less time.
So if a systolic array is built for the same scale as your problem, your bottleneck does indeed become how quickly you can send data to/from that dedicated system.
A couch expert on computer architecture here, but a large enough systolic array could be used to achieve their "physically possible" limit? [0]
New CUDA GPUs have been coming with these tensor cores that are just systolic arrays. Google's TPU are the same.
Could someone with more knowledge on systolic arrays comment on whether a large systolic array can achieve this?
[0] https://medium.com/intuitionmachine/googles-ai-processor-is-...