First you have to design an incredibly complex custom hardware processor to implement your ISA of choice with various speed optimisations. Then you have to convert it to a gate-level model and simulate it to make sure it's reliable.

Then you have to produce a physical/electromagnetic model which juggles capacitance, loading, switching transients, transmission line reflections, and interconnect length, and somehow still works for all possible conditions with good tolerances to maximise yield.

Then you have to handle all the visual/UV/soft X-ray optics, diffusion chemistry, and process management to build the wafers at scale.

It's not a particularly clean or sustainable industry. But even so - the finished chips are the absolute pinnacle of many simultaneous engineering and management disciplines.