Re:MIPS Becomes RISC-V
by arnd on Monday March 08, 2021 @07:56PM
(#26393867)
MIPSr6, aarch64 and riscv are siblings born from MIPSr5 plus the best of other RISC architectures.
ppc64le and 32-bit Arm are part of the wider family, but have some notable differences that make them slightly less RISC-like. Both include e.g. more complex condition code handling and instructions that operate on more than three registers.
ppc64le and 32-bit Arm are part of the wider family, but have some notable differences that make them slightly less RISC-like. Both include e.g. more complex condition code handling and instructions that operate on more than three registers.