No question here - just wanted to thank you for your always well-written and fascinating posts. I’m only a hobbyist with electronics but I’ve learned a lot from your tear downs.

As an aside it never ceases to fascinate me that it’s literally a tiny slice of quartz being used to create these precise timing signals.

Even i wanted to thank you for your contribution. I enjoyed your Apple 5w adapter teardown which I think is still popular. Wonder if the new 20w USB-C apple charger is still interesting.

You mention it at the very end, but any idea why a more complex (and presumably expensive) oscillator is used? Maybe availability of the IC?

It seems strange unless there is a performance (e.g. voltage stability due to stray capacitance sensitivity) advantage. It's not like they're worried about IP or litigation.

The different oscillator types have various tradeoffs, so maybe this more-complex design was better for this application, as you suggest. Since the circuit complexity is all on the integrated circuit, the cost difference is probably very small.

My other theory when people make strange design choices is that patents might be involved.

Possibly ease of manufacturing because you had fewer unique parts to make/keep track of. Also allows market segmentation, differentiated by the multiplier and whether the disable pin was connected.

Thanks for the article; it took me back to memories of bootleg replacing the 40MHz oscillator for a 50MHz on my work’s IIsi over my boss’ objection. Now I have some idea of what was inside.

Looking forward to any future work you might do to similarly explain the modern PLL oscillators as well as the even more modern programmable MEMS oscillators.

In the "How CMOS logic is implemented" section, the text about the NMOS transistor says the source and drain are "P+ silicon", but the diagram labels them as "n+ diffusion". Is "P+ silicon" somehow the same thing as "n+ diffusion"?

Oops, thanks for pointing that out. It's now fixed.

Thanks! It seemed confusing, but I didn't know enough about the terminology of silicon doping to know if it was correct. I probably should by now, I've been enjoying your teardowns for quite some time!

You say this:

> Although a multiplexer can be built with standard logic gates, the implementation with transmission gates is more efficient.

But why is that? Sorry, my knowledge of electronics is still pretty limited.

Also, in footnote 2, you’re missing a period (47174 MHz) :)

If you implement a multiplexer with logic gates, you'd probably do something like `(A and SEL_A) or (B and SEL_B) or (C and SEL_C) or (D and SEL_D)` where A-D are the inputs and SEL* are the select lines.

Using De Morgan's law, the gates could all be NAND gate. You'd have four 2-input NAND gates (4 transistors each) and a 4-input NAND gate (8 transistors), for a total of 24 transistors if I counted correctly. Using four transmission gates (2 transistors each) would only be 8 transistors. (There are various other tradeoffs I won't get into.)

If you didn't need the SEL lines elsewhere, you could fold the decoding into the multiplexer, eliminating the decoding gates, but the multiplexer still comes out ahead.

(And thanks for letting me know about the typo. It's nice to know someone reads the footnotes :-)

Because transmission gate literally are two transistors. Standard two input logic gate contains four. So for example you can build two to one multiplexer from two transmission gates for total of four transistors while implementing the same function from standard totem-pole logic would require at least three gates totaling 12 transistors. (In both cases assuming you already have complementary control input, which you usually either have or can share with something. This kind of sharing optimization is the reason why transmission gate usually has complementary input and does not include the inverter internally)

Is this related to why film cameras got crystal sync motors? When crystal sync motor runs and you record sound separately in a crystal sync sound recorder, do they need to run at same frequency to be syncable?

I don't know any more about camera motors than what I just read [1], but yes, the quartz crystals keep the motors running at the exact same speed. This kept the film camera and the magnetic tape recorder synchronized.

A semi-related thing that I find interesting is the clapperboard that film makers use at the start of each scene they record. I had assumed this was a cliche tradition, but it's an effective way to synchronize the film and audio. You can see on the film the frame where the clapper closes and easily synchronize this with the sudden loud noise in the audio.

[1] https://www.filmmaking.net/filmmakers-faq/130/what-is-crysta...

This works for short recordings, but for longer recordings explicit continuous sync is needed, almost universally using Timecode, because normal quartz oscillators are not precise nor stable enough to guarantee single frame accurate sync over, say, an hour (which would be 10 ppm or so, 1/3600*30)

I saw an eevblog teardown of an oscillator module like this, but that was newer, not this old stock.

Question for you. This component is technically not a crystal component right? I.e. you can hook the output straight into a clock input or anything that accepts a digital signal? There are other 2-terminal components where the circuit to drive the crystal is external, right?

Are those 2-terminal components literally just electrodes attached to a crystal or do they have extra circuitry in them as well?

(Sorry not Ken but:) Two terminal crystals are pretty much just electrodes attached to a crystal. The drive circuitry for those are usually integrated in the device

When I see an HN link from "righto.com" I reflex-click without hesitation. Always fascinating, always learn something (or a lot of things). Thank you!