FPGAs are extremely commonly used in the RF telecomm space. You don't implement a multiplier in the free-form FPGA fabric, instead such FPGAs have banks of 'DSP blocks' which essentially give you hard silicon ALUs which you can then hook up however you want. This gives you extremely flexible and potentially massive parallelism with very tight latency guarantees, and you don't lose a huge amount of performance because most of the heavy lifting is in hard silicon anyway. Also FPGAs excel at high bandwidth I/O, which is usually extremely important in these use-cases. A DSP or even a GPU might give you more FLOPs per W or $, but they'll usually struggle with latency.

The quad-code A53 CPUs with FPGAs sounds like Xilinx's RFSoCs, which are explicitly designed to basically give you a custom high-performance base station on a chip (though they can't directly convert to the frequency range Starlink is using).