I am not sure I have seen evidence for what you say. That is a complicated assertion because it speaks to wafer's started, wafer's finished, yield, die size, and technology among other things.

Honestly, I suspect that Intel's struggles (as per typical) with new technologies are around ossification of technical paths, struggles with yield, and copy-stupid. That leaves them struggling to produce the quantity that customers need, and has opened avenues for customers to find other routes that provide them with more control. They are also seeing the benefits of custom silicon and the possibilities of full stack optimization, as opposed to optimization of just one or two parts which largely drove older approaches to software/hardware/battery efficiency.

My other comment is that SPENDING on R&D is not always the best metric...