Re:ARM Cortex-A72 fetch and branch processing
by lukehutch on Monday December 14, 2020 @02:48PM
(#25422271)
What's the previously-investigated dataflow processor architecture that the author refers to in the bolded text?
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Re:ARM Cortex-A72 fetch and branch processing
by GregarianChild on Monday December 14, 2020 @04:44PM
(#25423771)
Speculation killed dataflow. (Attributed to Arvind 2005)
There have been many attempts at making data-flow applications compatible with general purpose computation workloads. They all failed to beat the performance of comparable conventional processors. [1] lists the following disadvantages of data-flow:
- Debugging difficult (no precise state)
- Interrupt/exception handling is difficult (what is precise state semantics?)
- Implementing dynamic data structures difficult in pure data flow models
- Too much parallelism? (Parallelism control needed)
- High bookkeeping overhead (tag matching, data storage)
- Instruction cycle is inefficient
[1] https://course.ece.cmu.edu/~ece740/f13/lib/exe/fetch.php?med...
Re:ARM Cortex-A72 fetch and branch processing
by monocasa on Monday December 14, 2020 @03:02PM
(#25422462)
I believe they're just commenting on how Tomusulo style OoO cores are internally similar to dataflow architectures in general, despite presenting a von Neumann veneer.
Re:ARM Cortex-A72 fetch and branch processing
by CalChris on Monday December 14, 2020 @09:17PM
(#25426248)
Right. So instead of speculation killed dataflow it's speculation used dataflow but in a useful way.
Re:ARM Cortex-A72 fetch and branch processing
by person_of_color on Tuesday December 15, 2020 @01:46AM
(#25427704)
Didn't Wave Computing try this?