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Re:A preview of x64 emulation on Windows for ARM by snvzz on Friday December 11, 2020 @08:10AM (#25385301)
>It's also a mix of CISC and RISC, it's not pure CISC now.

It's not. It's microcoded. Like VAX. Which RISC is a response to.

Re:A preview of x64 emulation on Windows for ARM by temac on Friday December 11, 2020 @07:36PM (#25393799)
CISC and RISC are mostly an ISA concept.

Most chips are "microcoded", at least here and there. The term does not define a whole micro-architecture, esp in modern complex ones, but I'm not really sure how you would implement old school CISC chips without microcode concepts. The 8086 was microcoded: https://www.reenigne.org/blog/8086-microcode-disassembled/. It basically means that "you" program some low level internal details of a chip, e.g. the muxes connecting various buses to execution units. Most of the time the "you" is only the chip designers, and it is stored mostly in a ROM. Sometimes microcoding is accessible by actual software programmers, but it is quite rare.

And modern u-ops are not necessarily like what was done at the time of old-school microcode.

Re:A preview of x64 emulation on Windows for ARM by oblio on Friday December 11, 2020 @09:53AM (#25386423)
Micro ops?
Re:A preview of x64 emulation on Windows for ARM by snvzz on Friday December 11, 2020 @05:56PM (#25392709)
Re:A preview of x64 emulation on Windows for ARM by jeffbee on Saturday December 12, 2020 @12:04AM (#25395732)
That's two completely different things. Every x86 instruction is decomposed into one or several micro-ops that are executed. Hardly any x86 instructions are microcoded, which means that the decoder has to start streaming micro-ops from the microcode ROM.