News for hackers. Stuff that matters.
Re:Apple Silicon M1 Disruption by jeffbee on Sunday December 06, 2020 @07:52PM (#25328241)
I think it will benefit Linux but not that way. It will force the x86 vendors to adopt the microarchitectural aspects of the M1 that make it fast in practice, instead of spending so much area/power budget chasing SPEC benchmarks. We will get better chips through competition.
Re:Apple Silicon M1 Disruption by alwillis on Sunday December 06, 2020 @10:29PM (#25329071)
It will force the x86 vendors to adopt the microarchitectural aspects of the M1 that make it fast in practice, instead of spending so much area/power budget chasing SPEC benchmarks. We will get better chips through competition.

There's only so much you can do with a 40-year old instruction set. There's certain things neither ARM or Intel can do compared to the M1.

Example: the max number of instruction decoders Intel and AMD can use is 4 and that brings tons of complexity due to x86 instructions ranging in size from 1-15 bytes. There's no way for the processor to know where the instruction boundaries lie except through trial and error essentially.

All ARM instructions are one size, so decoding them and having many instructions in flight at any given time is much easier. The M1 has 8 instruction decoders.

Short answer: the M1 can process twice as many instructions per clock cycle than Intel/AMD processors can.

The M1 and the Zen3 run neck and neck, with the Zen3 being slightly faster in some benchmarks.

But the Zen3 runs at 5 GHz and the M1 runs at 3.2 GHz, meaning if the M1 ran at 5 GHz, it would blow the Zen3 away. And of course, on a performance per watt basis, the M1 is the obvious winner.

This article gets into all the reasons why Intel and AMD are between a rock and a hard place when it comes to competing with the M1:

"Why Is Apple’s M1 Chip So Fast?"—https://debugger.medium.com/why-is-apples-m1-chip-so-fast-32...

Re:Apple Silicon M1 Disruption by jeffbee on Sunday December 06, 2020 @11:47PM (#25329396)
It sounds like you are just regurgitating some blog post you found. I don't have any workloads that are decode starved on x86 so it wouldn't make any difference if Intel had 50 decoders. I do have tons of workloads that spend a lot of time on TLB misses. I have several that are cache fill limited.
Re:Apple Silicon M1 Disruption by alwillis on Monday December 07, 2020 @12:34AM (#25329598)
It’s not about being starved for anything; it’s that Intel and AMD have legacy issues they can’t get around. They’ve pretty much out of bullets: more cores, higher clock frequencies, better manufacturing, etc.

The point they can’t process as many instructions per clock cycle and there’s nothing they can do about it. They can’t match the M1’s performance per watt.

And certainly there’s no Intel/AMD laptop processor with 8 or 16 Gb of RAM via a 128-bit memory bus on the same die. Same thing with a 16-core Neural Engine with an OS with the APIs to take advantage of them.

Re:Apple Silicon M1 Disruption by jeffbee on Monday December 07, 2020 @02:33AM (#25330097)
Intel's current generation CPUs have the same dual-channel LPDDR4X memory that Apple uses. Memory is not "on the same die" for either company because you don't make DRAM on the same process where you make CPUs.
Re:Apple Silicon M1 Disruption by Recurecur on Monday December 07, 2020 @03:33PM (#25337060)
The grandparent used the wrong term. The memory isn't on the die, but it is in the package (MCM). I don't think that provides faster throughput, but it should help latency.

Regardless, the big win was giving unified access to that memory using a memory fabric. That lets the GPU (for instance) access graphics assets with no copying - it just uses them in place.

AMD can absolutely do the same thing, if it desires. Intel can too, but it has a hill to climb WRT GPU performance.

Apple's AI chiplet is another matter...

Re:Apple Silicon M1 Disruption by kergonath on Sunday December 06, 2020 @08:01PM (#25328315)
I don’t think these goals are exclusive. I am not sure about the M1, but the A13 and A14 are doing quite well in SPEC benchmarks. If they have compromised these scores, it’s not obvious to me.
Re:Apple Silicon M1 Disruption by jeffbee on Sunday December 06, 2020 @08:17PM (#25328411)
I don't think they've compromised on SPEC performance at Apple, but I think they've chased it too hard at Intel. I'm sure I'd rather have more iTLB entries and more L1i cache than that third 512x512 FMA unit, if that's a trade that can be made.
Re:Apple Silicon M1 Disruption by stephencanon on Sunday December 06, 2020 @10:34PM (#25329088)
Second, not third, and chasing benchmark scores (instead of real workloads) would result in exactly the trade off you’re asking for; most pieces of SPEC will barely benefit from the second AVX512 FMA at all.
Re:Apple Silicon M1 Disruption by kergonath on Sunday December 06, 2020 @08:47PM (#25328592)
Sorry I misinterpreted. Isn’t this a reflection of the primary markets for both companies, though? When Intel is trying to sell chips for HPC clusters and expensive workstations, impractical vector units can make sense. Clearly Apple is not bothered by that and has a more balanced micro architecture for more common use cases.