Re:Computer input latency from 1977-2017 (2017)
by tuatoru on Thursday December 03, 2020 @02:32PM
(#25293449)
From Wikipedia: -
> The interface has two main signal lines, Data and Clock. ... To transmit a byte, the device simply outputs a serial frame of data (including 8 bits of data and a parity bit) on the Data line serially as it toggles the Clock line once for each bit.
Increasing the clock rate absolutely does reduce latency on a PS/2 port.
> The interface has two main signal lines, Data and Clock. ... To transmit a byte, the device simply outputs a serial frame of data (including 8 bits of data and a parity bit) on the Data line serially as it toggles the Clock line once for each bit.
Increasing the clock rate absolutely does reduce latency on a PS/2 port.
1. https://en.wikipedia.org/wiki/PS/2_port