MIT 6.004 L14: Implementing RISC-V Processor in Hardware

Re:MIT 6.004 L14: Implementing RISC-V Processor in Hardware by carapace on Saturday November 28, 2020 @03:57PM (#25240477)

Probably a sanguine moment to mention that the selfie project appears to have migrated from MIPS to RISC-V:

https://selfie.cs.uni-salzburg.at/

> An educational software system of a tiny self-compiling C compiler, a tiny self-executing RISC-V emulator, and a tiny self-hosting RISC-V hypervisor.

> Selfie is a project of the Computational Systems Group at the Department of Computer Sciences of the University of Salzburg in Austria.

> The Selfie Project provides an educational platform for teaching undergraduate and graduate students the design and implementation of programming languages and runtime systems. The focus is on the construction of compilers, libraries, operating systems, and even virtual machine monitors. The common theme is to identify and resolve self-reference in systems code which is seen as the key challenge when teaching systems engineering, hence the name.

(No affiliation, I just like it.)

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Re:MIT 6.004 L14: Implementing RISC-V Processor in Hardware by bogomipz on Sunday November 29, 2020 @12:17PM (#25246440)

Wow this is a very cool project! Do you know of any available video lecture from anyone teaching the curriculum? Unfortunately the name of the project makes searching a little difficult.

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Re:MIT 6.004 L14: Implementing RISC-V Processor in Hardware by carapace on Sunday November 29, 2020 @07:53PM (#25249668)

Cheers! I know what you mean about the name. I don't know of any videos offhand but you could just drop them an email and ask?

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