Latency in DRAM access is dominated by the controller logic on the CPU side (minority) and the bank access and amplification circuitry on the DRAM side (majority). Time of flight down the wires is fairly negligible.
Power draw for the interface does scale meaningfully with wire length though. Also, routing the 100+ signals (command, address, data, reference voltages) can be a challenge, especially if the package is constrained on pin count.
The tradeoff is that maximum RAM capacity is significantly reduced. Die can be thinned and stacked quite high, but the need to share command, address, data busses means signal integrity problems and increased power for the interface with no performance increase. Stacking die has yield issues as well, so cost rises faster than linear. And finally, power dissipation becomes a real issue, DRAM doesn't like getting too hot and the bottom of that stack is a long way from the heatsink.
But now that the whole industry is apparently going to non-socketed RAM, I don't think this is going to be much of a differentiator anymore.
If there was an XPS or ThinkPad with a Ryzen and socketed RAM, I would have already bought it... but if the choice is between a $1400 non-socketed MacBook or a $1400 non-socketed ThinkPad... that's a tough choice.
Perhaps it's beneficial for reduced power consumption? Or maybe it's just a design holdover from mobile, and it was the easiest place to put the RAM.
Though some people see upgradable RAM as a necessity, I'm not sure how often it actually happens in practice, if you look across consumers. I can't remember the last time I changed the RAM configuration after assembling a PC. One has to be a huge tinkerer for that to even enter into the picture.