These terms tend to invite a lot of confusion. First of all, open source is not the same as free. In fact, the best open source hardware is a proprietary implementation of code that is maintained by the open-source community, and unless you have endless time and resources, you probably don't want to do this yourself. In chips, an open-source implementation typically involves a "free" instruction set architecture, and the hot one today is RISC-V. Others include MIPS and POWER, which are open-source, but you can't play with the source code like you can with RISC-V.

An SoC is a whole-different beast, because it contains all of the other things needed to create a system, including on-chip memory, I/O, interconnects, possibly some analog components, and it all has to work together. The more complex ones have multiple power domains, circuits that turn off when others turn on, and there needs to be embedded software in some of these devices. Depending upon what process node it was developed at, it also may require multiple voltages and a complex power delivery network. And if you really want to push the performance, you probably want to put this into a complex package, possibly including other chips. Having configurability in there in the form of an FPGA or some programmable logic is an interesting option, which is what Intel has done and presumably what AMD will do with its proposed acquisition of Xilinx. That helps keep it tuned to changes in algorithms for AI and machine learning without having to completely re-do the design.

The challenge will be finding design tools to make sure you haven't messed up anywhere. The free tools tend to be difficult to use and generally ineffective. The commercial tools are much better, but they're also expensive. And the more complicated the design, the more you'll probably need to buy some expensive hardware or lease it from the cloud. Programmability won't solve any of this. It will simply help avoid obsolescence, or at least slow it down.

There's a good article on open source here: https://semiengineering.com/riding-the-risc-v-wave/, with more links at the bottom if you need more.