Re:An ex-ARM engineer critiques RISC-V
by hajile on Monday November 02, 2020 @09:33AM
(#24968475)
It's always been of the same value. You exchange performance for code density. They want aarch64 to be high-performance, so they removed thumb.
RISC-V compact instructions don't require special modes and run in fully-mixed mode with 32-bit instructions without all the penalties thumb has (they are literally just extended into their 32-bit counterparts internally).
RISC-V compact instructions don't require special modes and run in fully-mixed mode with 32-bit instructions without all the penalties thumb has (they are literally just extended into their 32-bit counterparts internally).