An ex-ARM engineer critiques RISC-V

Re:An ex-ARM engineer critiques RISC-V by deaddodo on Sunday November 01, 2020 @09:47PM (#24964426)

Thumb was removed from ARMv8 (AArch64). If you use 32-but legacy, it may exist on some chips; but it’s no longer the benefit it once was.

[ Parent | on HN ]

Re:An ex-ARM engineer critiques RISC-V by hajile on Monday November 02, 2020 @09:33AM (#24968475)

It's always been of the same value. You exchange performance for code density. They want aarch64 to be high-performance, so they removed thumb.

RISC-V compact instructions don't require special modes and run in fully-mixed mode with 32-bit instructions without all the penalties thumb has (they are literally just extended into their 32-bit counterparts internally).

[ Parent | on HN ]

Re:An ex-ARM engineer critiques RISC-V by deaddodo on Monday November 02, 2020 @03:51PM (#24973162)

> It's always been of the same value. You exchange performance for code density.

High code density became less valuable, was the point.

[ Parent | on HN ]