That's one of the tricks. But it doesn't solve the issue of clobbers, which Intel had to introduce new variants of ADD and MUL to solve. Named predicate registers make it all much easier for everyone.
Thanks. I knew about condition code renaming from discussion with an Intel compiler engineer. I didn't know about clobbers and I'll read up on that.
https://en.m.wikipedia.org/wiki/Intel_ADX is the solution Intel created.
Basically, if there's a bottleneck to x86 code, Intel has run into it, profiled for it and generally optimized around it both in their microarchitectures and in the their C compiler.