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Re:Amazon RDS on Graviton2 Processors by senkora on Thursday October 22, 2020 @08:17PM (#24864817)
I’m pretty sure x86 does have split L1i and L1d.

From Wikipedia (not the best source I know):

“L1 cache size unchanged at 32 KB (KiB) instruction and 32 KB (KiB) data cache per core.“

https://en.m.wikipedia.org/wiki/Skylake_(microarchitecture)

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