Re:Nvidia is reportedly in ‘advanced talks’ to buy ARM for m...
by duck2 on Friday July 31, 2020 @04:25PM
(#24013553)
"Building" for the latest process and large volumes is another story, but as far as I can see, large scale logic design is something not _that_ far away from software. Large scale, open source, and performant software designs exist in the wild. (see Linux, llvm, ...)
Why wouldn't we get a logic netlist which could perform reasonably well when placed on silicon by people who know what they are doing? (Yeah, lots of handwave.) I'm asking this out of curiosity. Not an expert in the field by any means.
Re:Nvidia is reportedly in ‘advanced talks’ to buy ARM for m...
by phkahler on Saturday August 01, 2020 @02:37PM
(#24022807)
SonicBoom is an open source Risc V core that is clock for clock competitive with the best from ARM. There is still the issue of matching clock speed and tweaking for a given process.
Foundries actually have an interest in helping to optimize an open core for their process as a selling point since it can be reused by multiple customers.
Re:Nvidia is reportedly in ‘advanced talks’ to buy ARM for m...
by skavi on Saturday August 01, 2020 @11:06PM
(#24026002)
Their own paper[0] shows it performing at similar levels to the A72, a four year old core. Those are obviously really impressive results for an open source core.
The best ARM core is Apple’s Lightning, which has an IPC rate about 4X that of the A72. [0]: https://carrv.github.io/2020/papers/CARRV2020_paper_15_Zhao....
RISK-V is just ISA.
You will have open source RISK-V microarchitectures for processes that are few generations old. You can use the same design long time when the performance is not so important.
You will not get open source optimized high performance microarchitectures for the latest process and large volumes. These cost $100s of millions to design and the work is repeated every few years for a new process. Every design is closely optimized for the latest fab technology. They have patents.
Intel, AMD, Nvidia, ARM, all have to design new microarchitectures every few years. It's not just doing some VHDL design. It involves research, pathfinding, large scale design, simulation, verification and working closely with fab business. The software alone costs millions and part of it is redesigned. Timelines are tight or the design becomes outdated over time.