It is 1x, obviously. But I highly doubt that the PCIe bus is going to be the bottleneck here ;-)

I guess it would be possible to design an ATX size motherboard with a RPi4 compute module slot (once CM4 becomes available). The PCIe bus would allow all sorts of peripherals. Don't expect any performance though.

Have you seen https://turingpi.com ? I can't imagine an ATX/ITX/STX compatible breakout board for everything on the Pi 4 would be an impossible task.

Well, yes, something like that, but not in a cluster form, but just a single CM4 on a mini-itx form factor board, with PCIe slots, USB ports, ethernet, etc.

You could build a fully blown Linux desktop peripheral wise, just don't expect desktop performance.

> The next obvious step is hooking up this to a PLX chip. Duplicating the number of lanes available even if there's no additional bandwidth could really open up doors.

I did this with an external PCIe 'splitter'/switch board: https://twitter.com/q3k/status/1225560443927891971

It worked, kinda. After a kernel rebuild with the drivers I wanted and dtb bumps to allow for more PCIe MEMBAR space i was able to get multiple devices (IIRC 10GbE and SATA controller) to work simulataneously, just very slowly.

> bumps to allow for more PCIe MEMBAR space

huh! huh! can you have enough BAR space for an AMD GPU to run?

Rockchip RK3399 is infamous for having too little for GPUs..

From the article it's 'just' a 1x PCI-E 2.0 lane (theoretical 5Gbps throughput). This is all the VL805 expects so all that's broken out to it's pads and 'easily' accessible.

It's 1 lane, but a 16x connector to allow plugging in any device. PCIe devices can be downgraded into a lower number of lanes. Many motherboard 16x connectors aren't even a full 16x.