I've never understood this argument. For some reason there is this RISC vs CISC war debate but it's not actually based on reality of modern day chip design. The idea is that the decoder is consuming too much power and this design flaw cannot be fixed. Simplifying the decoder reduces the power consumption and therefore allows higher clock frequencies. But when we look at the clock frequencies of ARM and x86 chips we consistently see that x86 chips run at higher frequencies (roughly 4 Ghz for x86 and 2.7 Ghz for ARM). If there is a difference between ARM and x86 chips then it's not in the decoder. The difference must lie in the micro architecture of the chips and therefore RISC vs CISC is no longer relevant because the ISA is by definition not part of the micro architecture.

Apple's ARM chips probably perform much better than reference ARM chips because they are much closer to the micro architecture that Intel uses. But Apple's chips still consume less power than Intel chips used in laptops. The secret sauce is probably the fact that the SoC has cores with different performance and power profiles. Big cores are used for peak performance bursts and lots of small cores for energy efficiency while the device is waiting for user input.

I think Geekbench is measuring peak performance and not sustained performance but the numbers are probably correct. Making a representative comparison between mobile devices and desktops isn't possible because their different thermal profiles but it's highly likely that Apple will go for a passively cooled design if they can.