Programming a 144-computer Chip to Minimize Power (2013)

Re:Programming a 144-computer Chip to Minimize Power (2013) by fortran77 on Monday May 11, 2020 @12:44PM (#23144114)

The DEFCON 22 badge was done on a Propeller. I did a little pokeing around on it--very interesting architecture. But they don't all run at once.... It's just a way to switch contexts instantly.

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Re:Programming a 144-computer Chip to Minimize Power (2013) by dkersten on Monday May 11, 2020 @07:02PM (#23148267)

That’s not what the datasheet says. It says:

”... its eight processors, called cogs, that can perform simultaneous tasks independently or cooperatively...”

” True parallel processing with eight symmetric 32-bit processors (cogs) in one microcontroller”

”20 MIPS per cog, 160 MIPS total with all cogs running”

”All eight cogs are driven from the System Clock; they each maintain the same time reference and all active cogs execute instructions simultaneously.”

https://www.parallax.com/sites/default/files/downloads/P8X32...

The shared hub memory is only accessible to one core at once and which one has access is switched between in round robin fashion, each core getting a turn to access it once every 16 clock cycles. Perhaps that’s what you were thinking of?

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Re:Programming a 144-computer Chip to Minimize Power (2013) by fortran77 on Tuesday May 12, 2020 @09:33AM (#23153777)

Yes! Thanks! 8 years ago, it's hard to remember things.

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Re:Programming a 144-computer Chip to Minimize Power (2013) by duskwuff on Monday May 11, 2020 @03:17PM (#23145857)

They do all run at once. All eight "cogs" exist as discrete hardware within the chip, and can perform operations on their cog RAM and I/Os simultaneously.

What doesn't happen all at once is access to main RAM. That's handled by a round-robin arbiter.

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