[1] https://en.wikipedia.org/wiki/Asynchronous_array_of_simple_p...
”... its eight processors, called cogs, that can perform simultaneous tasks independently or cooperatively...”
” True parallel processing with eight symmetric 32-bit processors (cogs) in one microcontroller”
”20 MIPS per cog, 160 MIPS total with all cogs running”
”All eight cogs are driven from the System Clock; they each maintain the same time reference and all active cogs execute instructions simultaneously.”
https://www.parallax.com/sites/default/files/downloads/P8X32...
The shared hub memory is only accessible to one core at once and which one has access is switched between in round robin fashion, each core getting a turn to access it once every 16 clock cycles. Perhaps that’s what you were thinking of?
What doesn't happen all at once is access to main RAM. That's handled by a round-robin arbiter.
I think that many core architectures can actually be simpler to program in an embedded context than the traditional single core systems. It's akin to a hardware implementation of the actor model rather than an interrupt state machine or interrupt event loop. Being able to dedicate cores to single I/O tasks means you can bitbang almost anything. Here's HDMI running in a few lines of code on a Propeller 2 with no external components but the HDMI connector: https://forums.parallax.com/discussion/comment/1475075/#Comm...