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Re:Three of Apple and Google’s former star chip designers la... by Someone on Saturday November 23, 2019 @06:00PM (#21617193)
x64 has that problem, in the extreme (max length of an instruction is 15 bytes) doesn’t it?

It must be a pain to design its instruction decoder, but I don’t think that’s insurmountable for high end processors.

Or do I misunderstand your argument?

Re:Three of Apple and Google’s former star chip designers la... by Symmetry on Sunday November 24, 2019 @08:49AM (#21620389)
Yes, it certainly does. As far as I can tell it takes more engineer hours to make an efficient x86 front end than it does a RISC front end and the RISC designs I see tend to balance their pipelines so that they're wider in front than x86 designs typically are. Everything here is a matter of "all else being equal" and the talent and hard work of the design team are more important than any of the ISA differences we're talking about here.