The error rate of raw flash is incredibly high -- it takes loads of error correction to make it reliable, especially with modern MLC and QLC memories -- and the structure of flash erase blocks means that it doesn't support random-access writes. A proper flash translation layer, implemented in hardware, means that software can forget about all the strange features of flash and use it as general-purpose block storage.
You may need a basic background in solid state physics for some parts.
And SSDs already abstract that without adding a key-value store on top of it.
It's telling that high-end embedded Linux devices, like Android phones, typically use storage devices which implement their own translation layer, like eMMC or NVMe devices, not raw flash.
Managing 16MB of SLC NOR flash is trivial for a 580MHz MIPS core with 32MB of DRAM. Managing 16TB of TLC NAND is completely different. There's a reason that SSDs almost always have 1GB of DRAM for every 1TB of NAND.
Or perhaps the h.264/h.265 codecs built into modern CPUs and GPUs?
And this isn't at all a new phenomenon, either. We've been using accelerators and coprocessors (as they were often originally known) for decades.