Re:What Every Programmer Should Know About Memory (2007) [pdf]
by 3JPLW on Monday March 04, 2019 @03:08PM
(#19304840)
I don't think you need to explain the intricacies of the MESI protocol — just explaining the fact that caches need to be consistent is quite sufficient. Perhaps throw in why they must be consistent. It then becomes clear that the cores need to communicate (somehow) to maintain this consistency if they're touching data within the same cache line.
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Re:What Every Programmer Should Know About Memory (2007) [pdf]
by dragontamer on Monday March 04, 2019 @03:43PM
(#19305215)
MESI isn't really that complicated. Cache-lines are either Exclusive owned, Shared, Invalid, or Modified. CPU Cores communicate to each other which lines are owned or unowned, and that's how the caches stay coherent. If a CPU Core wants to change a cache-line owned by another core, they have to wait until the line is closed (set to "Invalid" state) by the other core.
I think its easier to explain cache-coherence through MESI, rather than to abstractly just say "Caches are coherent". At least personally, I didn't understand cache coherence until I sat down and really tried to understand MESI.
I guess other people learn differently than I do, but I always view cache-coherence through the MESI lens.