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A comment on Building a RISC-V PC. Parent comment

Re:Building a RISC-V PC by wmf on Friday February 08, 2019 @05:28PM (#19119294)
it's about having a chip you can truly trust

This gets repeated over and over but I don't get it. You could build a blob-free ARM chip. Existing RISC-V chips already have/had blobs. Freeeeedom is orthogonal to the ISA.

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Re:Building a RISC-V PC by floatboth on Saturday February 09, 2019 @06:25AM (#19121811)
I guess with a royalty-free ISA the chips themselves are a bit more likely to be open source? SiFive has a lot of HDL (Chisel) code on their GitHub. I can find at least the I/O blocks: https://github.com/sifive/sifive-blocks/tree/master/src/main...
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