It didn’t get hung up on RISC purity and introduced a series of instructions that kept code sizes down: single instruction Indexed Loads (normal and scaled), single instruction Address updates, bitfield operations, FMADD, subword operations (making decimal math ops faster), a bunch of branch path instructions and a handfull of others.

It had 32 64bit FP registers that could also be used as 64 32bit registers or 16 128bit registers. For the time this was novel.