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A comment on Verilog sources for Western Digital's open source RISC-V core. Parent comment

Re:Verilog sources for Western Digital's open source RISC-V ... by Dylan16807 on Sunday January 27, 2019 @12:19AM (#19010447)
(AVR isn't RISC-V)

Having page tables at all is completely optional on RISC-V. This is a chip with no MMU.

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