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A comment on Verilog sources for Western Digital's open source RISC-V core. Parent comment

Re:Verilog sources for Western Digital's open source RISC-V ... by FPGAhacker on Saturday January 26, 2019 @11:00PM (#19010278)
I don't know why WD released this, but it would be useful for people building SoC ASICs that don't want to license an ARM core. Depending on the licensing.
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