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A comment on How low can you go? Ultra low latency Java in the real world [video]. Parent comment

Re:How low can you go? Ultra low latency Java in the real wo... by snaky on Friday December 21, 2018 @06:59AM (#18732822)
Not happening.

Rewriting some hot path parts of the stack in Verilog is a usual thing, and rewriting some other parts in Coq is the future.

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Re:How low can you go? Ultra low latency Java in the real wo... by twic on Friday December 21, 2018 @10:30AM (#18733872)
Is it possible to synthesize hardware from Coq?
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Re:How low can you go? Ultra low latency Java in the real wo... by mruts on Friday December 21, 2018 @11:33AM (#18734369)
Not entirely on topic, but Jane Street (HFT ETF market maker) wrote an OCaml to FPGA compiler

https://www.janestreet.com/tech-talks/ocaml-all-the-way-down...

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Re:How low can you go? Ultra low latency Java in the real wo... by snaky on Friday December 21, 2018 @02:03PM (#18735634)
Yes.

https://deepspec.org/entry/Project/Kami http://conal.net/blog/posts/haskell-to-hardware-via-cccs

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